1. Field Of The Invention
The present invention relates to a computer apparatus, and more particularly to correcting and adjusting means for a data processor.
2. SUMMARY OF THE INVENTION
In the course of setting up and/or operating a digital computer, the successive process routines are directed by successive instructions which, for example, may be stored in a memory unit. Such instructions are called into operation by addressing the portion of the memory unit in which the desired instruction is stored. On occasion it may be desirable to override a particular instruction with a different instruction. Alternatively, in starting up a series of routines, there may be certain address identifications which represent either an invalid address in that routine or an address at which there is an improper instruction stored. Such errors may occur, for instance, in the establishment of a new system of routines and would appear in efforts to correct such a routine, known as "debugging."
It is, accordingly, and object of the present invention to provide an improved computer apparatus with means to facilitate instruction changes.
It is another object of the present invention to provide, in a computer apparatus, an improved alarm and correction means.
In accomplishing these and other objects, there has been provided, in accordance with the present invention, a computer apparatus including means for comparing the address stored in an address register with a preset address. When the stored address matches the preset address the comparison means issues an alarm signal which may be used to effect an immediate halt in the execution of a routine, trigger suitable alarm annunicators or, selectively, to enable the injection into the routine of an overriding preset instruction.